Switch Protection Design - Fast-Recovery Diodes

Abstract
The number of fast recovery applications in high power systems
continues to grow leading to various dynamic constraints and
hence different diode designs and behaviours. Along with
conventional RC (“SCR-type”) and C (“GTO-type”) snubber
conditions, snubberless conditions in both IGBT and IGCT
applications are gaining ground at ever higher currents and
voltages (presently 6 kV). Within these two groups, the further
distinctions of “inductive” and “resistive” commutation di/dt must
be made for an optimal diode design. Diodes capable of high
reverse di/dt and dv/dt can today be realised thanks to controlled
life-time profiling which will be described here with both measured
and simulated results. As will also be explained, such “robust”
designs, though essential for snubberless operation, may be “less
robust” under snubbered conditions so that a clear understanding
of the application (Snubber, Free-Wheel, Clamp, Resistive or
Inductive di/dt) is required for the correct choice or design of a fast
recovery diode. The different diode commutation conditions will
be described and categorised and the optimal diode design
identified with supporting measurements and simulations.

Fig 2 “Inductive” commutation circuit fitted
with snubber and clamp

Traditionally the diode under consideration (in this case a
Free-Wheel Diode (FWD)) is fitted with a snubber and may also
be fitted with a clamp as shown in Fig. 2. Thus for the inductive
commutation circuit, we can define the additional sub-conditions
consisting of permutations of the snubbered/unsnubbered &
clamped/unclamped conditions whereby the snubber controls
the Duet’s dv/dt whereas the clamp controls its peak voltage.

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Mosfet Snubber Circuit in Flyback Converter Circuit

Mosfet Protection in flyback Circuit

PKC-136

PEAK CLAMP

CHARACTERISTICS
VBR 160Vdc
VDRM 700Vdc
P 1.5W

Feature
- Protection of the Mosfet in flyback power supply
- TRANSIL™ and blocking diode in a single
package

BENEFITS

- Accurate voltage clamping regardless load
- Reduced current loop
- Reduced EMI emission
- High integration
- Fast assembly
- Reduced losses in stand by mode

PKC-136 datasheet pdf


Mosfet Snubber Circuit in Flyback Converter

Fig. 1 Typical flyback convertor with drain clamping circuits

ZenBlock
Zener with integrated blocking diode
Philips Semiconductors' new ZenBlockTM replaces
double-diode-, RCD- or RC-snubbers in flyback convertors.
The new components offer circuit designers the important
benefits of lower component count and board usage, reduced
EMI, optimal clamping at all loads and higher efficiency.

Introducing

The new ZenBlock combines the double diode snubber in one
package. This leads to the following advantages:
-Fewer components.
-Reduced circuit board space
-Lower EMI by reducing the drain clamp circuit length and
area.
-Optimal clamp performance at all loads (compared with RCD
and RC snubber)
-Higher efficiency at low loads (compared with RCD and RC
snubber)

ZenBlock datasheet pdf

Push-Pull Snubber Circuit

Abstract
The DS3984, DS3988, DS3881, DS3882, DS3992, and DS3994
are cold-cathode fluorescent lamp (CCFL) controllers that use a
push-pull architecture to create the high-voltage AC waveforms
needed to drive the lamps. In a push-pull drive scheme, the
parasitic inductance of the step-up transformer, together with the
parasitic capacitance of the output of the n-channel power
MOSFETs, form a resonant circuit that can create unwanted
voltage spikes. High-voltage spikes can increase the stress on
the power MOSFETs and can also increase the electromagnetic
interference (EMI) created by the system. This application note
describes how to suppress the voltage spikes with a simple
resistor-capacitor (RC) network.

Push-pull drain snubber circuit.

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Design the MOSFET RCD Snubber Circuit

When the power MOSFET is turned off, there is a high
voltage spike on the drain due to the transformer leakage
inductance. This excessive voltage on the MOSFET may
lead to an avalanche breakdown and eventually failure of the
FPS. Therefore, it is necessary to use an additional network
to clamp the voltage.

The RCD snubber circuit and MOSFET drain voltage
waveform are shown in Figure 10 and 11, respectively. The
RCD snubber network absorbs the current in the leakage
inductance by turning on the snubber diode (Dsn) once the
MOSFET drain voltage exceeds the voltage of node X as
depicted in Figure 10. In the analysis of snubber network, it
is assumed that the snubber capacitor is large enough that its
voltage does not change significantly during one switching
cycle. The snubber capacitor used should be ceramic or a
material that offers low ESR. Electrolytic or tantalum
capacitors are unacceptable due to these reason
Circuit diagram of the snubber network

The first step in designing the snubber circuit is to determine
the snubber capacitor voltage at the minimum input voltage
and full load condition (Vsn). Once Vsn is determined, the
power dissipated in the snubber network at the minimum
input voltage and full load condition is obtained as

where Ids-peak is specified in equation (8), fs is the FPS
switching frequency, Llk is the leakage inductance, Vsn is the
snubber capacitor voltage at the minimum input voltage and
full load condition, VRO is the reflected output voltage and
Rsn is the snubber resistor. Vsn should be larger than VRO
and it is typical to set Vsn to be 2~2.5 times VRO. Too small a
Vsn results in a severe loss in the snubber network as shown
in equation (23). The leakage inductance is measured at the
switching frequency on the primary winding with all other
windings shorted.
Then, the snubber resistor with proper rated wattage should
be chosen based on the power loss. The maximum ripple of
the snubber capacitor voltage is obtained as

where fs is the FPS switching frequency. In general, 5~10%
ripple of the selected capacitor voltage is reasonable.
The snubber capacitor voltage (Vsn) of equation (26) is for
the minimum input voltage and full load condition. When
the converter is designed to operate in CCM under this
condition, the peak drain current together with the snubber
capacitor voltage decrease as the input voltage increases as
shown in Figure 11. The peak drain current at the maximum
input voltage and full load condition (Ids2 peak) is obtained as

where Pin, and Lm are specified in equations (1) and (6),
respectively and fs is the FPS switching frequency.
The snubber capacitor voltage under maximum input voltage
and full load condition is obtained as

where fs is the FPS switching frequency, Llk is the primary
side leakage inductance, VRO is the reflected output voltage
and Rsn is the snubber resistor.

Figure 11. MOSFET drain voltage and snubber
capacitor voltage

From equation (26), the maximum voltage stress on the
internal MOSFET is given by

where VDC max is specified in equation (3). Check if Vds

max is below 85% of the rated voltage of the
MOSFET (BVdss) as shown in Figure 12. The voltage rating
of the snubber diode should be higher than BVdss. Usually,
an ultra fast diode with 1A current rating is used for the
snubber network.

In the snubber design in this section, neither the lossy
discharge of the inductor nor stray capacitance is considered.
In the actual converter, the loss in the snubber network is

Less than the designed value due to this effects

Source
Design Considerations for Battery Charger Using
Green Mode Fairchild Power Switch (FPSTM)

http://www.fairchildsemi.com/an/AN/AN-4138.pdf